Recently, attention has been paid to flip chip mounting using a semiconductor chip with a bump electrode (bump) made of solder or the like.
In the flip chip mounting, commonly, a semiconductor chip is bonded to a substrate, and a sealing resin is injected. Patent Literature 1 discloses a sealing resin having a viscosity of 50 Pa·s or lower (25° C.) and a viscosity upon injection of 2 Pa·s or lower.
Along with recent downsizing of semiconductor chips, the pitch between electrodes has become narrower. In addition, the gap between semiconductor chips or between a semiconductor chip and a substrate has also become narrower. Such a situation has developed a method of bonding a semiconductor chip to a substrate on which a liquid adhesive is preliminary applied, instead of injecting a sealing resin after the bonding. Patent Literature 2 discloses a liquid epoxy resin composition having a thixotropic index before curing of 1.1 to 4.0 which can be applied while keeping its form.
A semiconductor chip is also bonded to a substrate or a semiconductor chip using an adhesive film (NCF) preliminarily attached to the substrate or the semiconductor chip. Patent Literature 3 discloses a sheet-like adhesive having a minimum melt viscosity within a range of 40 Pa·s to 5100 Pa·s. In relation to a problem that a sheet-like adhesive partially oozes out in a lateral direction upon pressure bonding to spread over a side face to reach the top face of the semiconductor element, the sheet-like adhesive according to Patent Literature 3 favorably suppresses protrusion of the adhesive in a lateral direction, so that defective products due to undesired protrusion of the adhesive are less likely to be produced.
In such a method, however, air bubbles (voids) may be formed between electrodes upon bonding. Moreover, since “bonding of electrodes” and “curing of an adhesive film” are carried out at the same time by heating, compatible achievement of precise bonding of electrodes and suppression of formation of voids is not easy.
A type of the flip chip mounting drawing attention recently is a three-dimensional stacking technique using a through silicon via (TSV) that enables significant improvement in performance and downsizing of a device produced by stacking multiple semiconductor chips.
In the stacking technique using TSV, commonly, multiple semiconductor chips each with a through electrode (TSV chips) are stacked on a semiconductor wafer at each of bonding sites formed in a grid pattern using an adhesive film provided between respective chips. Then, the semiconductor wafer was cut along dicing lines in a grid pattern, thereby producing a multilayer semiconductor chip laminate.
However, since semiconductor chips of the same size are stacked, adhesive films problematically protrude around the semiconductor chips to form burrs. Such burrs (edge portions, end portions) may be formed at any portions between the stacked semiconductor chips. Long burrs tend to fall off during dicing to contaminate the surroundings, leading to defective products. Though a wide interval between dicing lines can prevent long burrs from falling off during dicing, the interval of dicing lines is desired to be narrowed in terms of productivity.
The sheet-like adhesive disclosed in Patent Literature 3, for example, can be applied to the stacking technique using TSV. However, since the sheet-like adhesive is originally designed to suppress protrusion of the adhesive in a lateral direction upon bonding of a semiconductor chip to a substrate and not intended to be used for stacking multiple semiconductor chips, the length of burrs cannot be sufficiently reduced.